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| TP2520 P-Channel Enhancement Mode Vertical DMOS FETs Features Low threshold -- -2.4V max. High input impedance Low input capacitance -- 125pF max. Fast switching speeds Low ON-resistance Free from secondary breakdown Low input and output leakage Complementary N and P-channel devices General Description This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermallyinduced secondary breakdown. Supertex's vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Applications Logic level interfaces - ideal for TTL and CMOS Solid state relays Battery operated systems Photo voltaic drives Analog switches General purpose line drivers Telecom switches Ordering Information BVDSS/BVDGS (V) RDS(ON) max () VGS(th) max (V) ID(ON) min (A) Package Option TO-243AA (SOT-89) TN2520N8-G -200 12 -2.4 -0.75 -G indicates package is RoHS compliant (`Green') Pin Configuration DRAIN Absolute Maximum Ratings Parameter Drain-to-source voltage Drain-to-gate voltage Gate-to-source voltage Operating and storage temperature Soldering temperature* Value BVDSS BVDGS 20V -55C to +150C 300C GATE SOURCE DRAIN TO-243AA (SOT-89) (N8) Product Marking TP5CW Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. * Distance of 1.6 mm from case for 10 seconds. W = Code for week sealed TO-243AA (SOT-89) (N8) TP2520 Thermal Characteristics Package TO-243AA (SOT-89) ID (continuous)* (mA) ID (pulsed) (A) Power Dissipation @ TA = 25OC (W) O jc C/W O ja C/W IDR* (mA) IDRM (A) -260 -2.0 1.6 15 78() -260 -2.0 * ID (continuous) is limited by max rated Tj . Mounted on FR5 board, 25mm x 25mm x 1.57mm. Electrical Characteristics (T = 25C unless otherwise specified) A Symbol BVDSS VGS(th) VGS(th) IGSS IDSS Parameter Drain-to-source breakdown voltage Gate threshold voltage Change in VGS(th) with temperature Gate body leakage Zero gate voltage drain current Min -200 -1.0 -0.25 -0.75 100 - Typ -0.7 -2.1 10 8.0 250 75 20 10 300 Max -2.4 4.5 -100 -10 -1.0 15 12 1.7 125 85 35 10 15 20 15 -1.8 - Units V V mV/OC nA A mA A %/ C mmho pF O Conditions VGS = 0V, ID = -2.0mA VGS = VDS, ID= -1.0mA VGS = VDS, ID= -1.0mA VGS = 20V, VDS = 0V VGS = 0V, VDS = Max Rating VGS = 0V, VDS = 0.8 Max Rating, TA = 125C VGS = -4.5V, VDS = -25V VGS = -10V, VDS = -25V VGS = -4.5V, ID = -100mA VGS = -10V, ID = -200mA VGS = -10V, ID = -200mA VDS = -25V, ID = -200mA VGS = 0V, VDS = -25V, f = 1.0 MHz VDD = -25V, ID = -0.75A, RGEN = 25 VGS = 0V, ISD = -0.5A VGS = 0V, ISD = -0.5A ID(ON) RDS(ON) RDS(ON) GFS CISS COSS CRSS td(ON) tr td(OFF) tf VSD trr ON-state drain current Static drain-to-source ON-State resistance Change in RDS(ON) with temperature Forward transconductance Input capacitance Common source output capacitance Reverse transfer capacitance Turn-ON delay time Rise time Turn-OFF delay time Fall time Diode forward voltage drop Reverse recovery time ns V ns Notes: (1) All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300s pulse, 2% duty cycle.) (2) All A.C. parameters sample tested. Switching Waveforms and Test Circuit 0V 10% INPUT -10V PULSE GENERATOR 90% t(OFF) tr td(OFF) tF INPUT RGEN D.U.T. Output RL 10% t(ON) td(ON) 0V 90% OUTPUT VDD 90% 10% VDD 2 TP2520 Typical Performance Curves Output Characteristics -2.5 -2.0 Saturation Characteristics VGS = -10V -2.0 -8V -1.6 ID (amperes) -1.5 ID (amperes) VGS = -10V -1.2 -6V -1.0 -8V -6V -0.8 -0.5 -4V -3V -0.4 -4V -3V 0 -2 -4 -6 -8 -10 0 0 -10 -20 -30 -40 -50 0 VDS Transconductance vs. Drain Current 1.0 2.0 VDS (volts) Power Dissipation vs. Ambient Temperature 0.8 VDS = -25V TO-243AA GFS (siemens) TA = -55C 0.4 PD (watts) 0.6 1.0 TA = 25C TA = 125C 0.2 0 0 -0.4 -0.8 -1.2 -1.6 -2.0 0 0 25 50 75 100 125 150 ID (amperes) Maximum Rated Safe Operating Area -10 1.0 TA (C) Thermal Response Characteristics Thermal Resistance (normalized) TA = 25C TO-243AA (pulsed) ID (amperess) -1.0 0.8 0.6 0.4 -0.1 TO-243AA (DC) 0.2 TO-243AA TA = 25C PD = 1.6W -0.01 -1 -10 -100 -1000 0 0.001 0.01 0.1 1 10 VDS tP (seconds) 3 TP2520 Typical Performance Curves (cont.) BVDSS Variation with Temperature 50 1.1 40 On-Resistance vs. Drain Current BVDSS (normalized) VGS = -4.5V RDS(ON) (ohms) 30 1.0 20 VGS = -10V 10 0.9 0 -50 0 50 100 150 0 -0.5 -1.0 -1.5 -2.0 -2.5 Tj (C) Transfer Characteristics -2.5 1.2 -2.0 ID (amperes) V(th) and RDS Variation with Temperature 2.5 VDS = -25V VGS(th) (normalized) 2.0 25C 1.1 -1.5 1.5 1.0 125C -1.0 V(th) @ -1mA 1.0 0.9 0.5 0.8 -0.5 0 0 -2 -4 -6 -8 -10 -50 0 50 100 150 0 VGS (volts) Capacitance vs. Drain-to-Source Voltage 200 -10 Tj (C) Gate Drive Dynamic Characteristics f = 1MHz -8 150 VDS = -10V C (picofarads) VGS (volts) -6 100 VDS = -40V -4 CISS 50 200pF -2 CRSS 0 0 -10 -20 -30 COSS 0 -40 0 73pF 0.5 1.0 1.5 2.0 2.5 VDS (volts) QG (nanocoulombs) 4 RDS(ON) (normalized) TA = -55C ID (amperes) RDS(ON) @ -10V, -0.2A TP2520 3-Lead TO-243AA (SOT-89) Package Outline (N8) Symbol MIN Dimensions (mm) NOM MAX A 1.40 1.60 b 0.44 0.56 b1 0.36 0.48 C 0.35 0.44 D 4.40 4.60 D1 1.62 1.83 E 2.29 2.60 E1 2.13 2.29 e 1.50 BSC e1 3.00 BSC H 3.94 4.25 L 0.89 1.20 JEDEC Registration TO-243, Variation AA, Issue C, July 1986. Drawings not to scale. Doc.# DSFP - TP2520 A101507 5 |
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